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| Another ASI Fellow |
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Dr. Adrian J. Isles, Ph.D. Dr. Adrian Isles has worked on pioneering new methodologies and technologies in the area of static functional verification for RTL designs. Currently, he is one of the architects and chief developers of Solidify, Averant Inc.’s flagship static functional verification tool. Dr. Isles obtained his B.S. in Electrical Engineering from Howard University in 1993 and his M.S. and Ph.D. in Electrical Engineering and Computer Science from the University of California, Berkeley in 1997 and 2000, respectively. His research focus is in areas related to computer-aided design and formal verification of integrated circuits. Since 1990, he has also worked with Intel Corporation and Massachusetts Institute of Technology, Lincoln Laboratory. He has written numerous research papers in the field and holds several patents. |
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